Espressif Systems /ESP32-P4 /SPI0 /SPI_MEM_INT_ENA

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Interpret as SPI_MEM_INT_ENA

Description

SPI0 interrupt enable register

Fields

SPI_MEM_SLV_ST_END_INT_ENA	The enable bit for SPI_MEM_SLV_ST_END_INT interrupt.
SPI_MEM_MST_ST_END_INT_ENA	The enable bit for SPI_MEM_MST_ST_END_INT interrupt.
SPI_MEM_ECC_ERR_INT_ENA	The enable bit for SPI_MEM_ECC_ERR_INT interrupt.
SPI_MEM_PMS_REJECT_INT_ENA	The enable bit for SPI_MEM_PMS_REJECT_INT interrupt.
SPI_MEM_AXI_RADDR_ERR_INT_ENA	The enable bit for SPI_MEM_AXI_RADDR_ERR_INT interrupt.
SPI_MEM_AXI_WR_FLASH_ERR_INT_ENA	The enable bit for SPI_MEM_AXI_WR_FALSH_ERR_INT interrupt.
SPI_MEM_AXI_WADDR_ERR_INT__ENA	The enable bit for SPI_MEM_AXI_WADDR_ERR_INT interrupt.
SPI_MEM_DQS0_AFIFO_OVF_INT_ENA	The enable bit for SPI_MEM_DQS0_AFIFO_OVF_INT interrupt.
SPI_MEM_DQS1_AFIFO_OVF_INT_ENA	The enable bit for SPI_MEM_DQS1_AFIFO_OVF_INT interrupt.
SPI_MEM_BUS_FIFO1_UDF_INT_ENA	The enable bit for SPI_MEM_BUS_FIFO1_UDF_INT interrupt.
SPI_MEM_BUS_FIFO0_UDF_INT_ENA	The enable bit for SPI_MEM_BUS_FIFO0_UDF_INT interrupt.

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